To automate the painstaking task of designing chips, Google researchers have developed an AI model – that designs a complex chip in hours.
This breakthrough work is so successful that Google used it for making its data center chips, which run AI operations. This new model is receiving industry-wide appreciation since it removed a burdensome task plaguing engineers for decades.
Chip Designing in Under 6 Hours!
Designing a complex chip that’s the size of our fingernails is so hard. It requires placing billions of components connected on a silicon die fitted into the end device for high performance and efficiency.
This is a tiresome task, as several engineers working on it will take several months to show up with a satisfying model. But, the critical work in this space can be cut off to an extent, as Google made a much-needed breakthrough.
Excited to share that our work has been published in Nature! Our RL agent generates chip layouts in just a few hours, whereas human experts can take months. These superhuman AI-generated layouts were used in Google's latest AI accelerator (TPU-v5)! https://t.co/k12Kj4jfbC
— Anna D Goldie (@annadgoldie) June 9, 2021
Researchers at Google have made an AI model capable of designing a complex chip in under 6 hours! And that, too, meeting the operational requirements like expected power efficiency and performance.
For this, the Google researchers have fed their invention about 10,000 chip layouts and trained with reinforcement training. This led the AI model to produce an optimized chip design that was so good that Google used it for its next-generation AI accelerators (Tensor Processing Units) used in data centers to run AI operations.
Very nice work from Google on deep RL- based optimization for chip layout.
Simulated annealing and its heirs are finally dethroned after 40 years.
This uses graph NN and deConvNets, among other things.
I did not imagined back in the 90s that (de)ConvNets could be used for this. https://t.co/WY68QNnuMY
— Yann LeCun (@ylecun) June 10, 2021
The importance of this invention will be better understood if a chip design process is known. It requires placing thousands of memory blocks on a silicon die, effectively that, later, a thousand of millions of standard cells (logic gates) will be placed among them. All these will be wired together!
This whole settlement and connections need to be carefully designed, as it ultimately determines how well the chip could run. Thus, Google’s AI removing the hassle of these placement designs helps engineers skip the hassle process and focus on other related works.